List of all items

Structs

• arch::ShiftResults
• cpu::arm_cpu::ArmCpu
• cpu::registers::Cpsr
• cpu::registers::CpsrSnapshot
• cpu::registers::Registers
• cpu::registers::RegistersSnapshot
• emulator::Emulator
• io::config9::_Config9Registers
• memory::memory_bus::MemoryBus
• memory::memory_bus::MemoryBusState

Enums

• cpu::arm_cpu::Processor
• cpu::registers::OperatingMode
• memory::memory_bus::MemoryBusAccessor

Traits

• arch::memory_access::MemoryAccessByte
• arch::memory_access::MemoryAccessHalfword
• arch::memory_access::MemoryAccessWord
• component::reset::Reset
• component::snapshot::Snapshot

Functions

• arch::arithmetic_flag::did_add_generate_carry
• arch::arithmetic_flag::did_add_generate_overflow
• arch::arithmetic_flag::did_sub_generate_borrow
• arch::arithmetic_flag::did_sub_generate_overflow
• arch::instruction_specified_shift::arithmetic_shift_right
• arch::instruction_specified_shift::rotate_right
• arch::instruction_specified_shift::shift_left
• arch::instruction_specified_shift::shift_right
• arch::memory_access::write_little_endian_halfword
• arch::memory_access::write_little_endian_word
• arch::register_specified_shift::arithmetic_shift_right
• arch::register_specified_shift::rotate_right
• arch::register_specified_shift::shift_left
• arch::register_specified_shift::shift_right
• util::bit_manipulation::is_bit_set_16
• util::bit_manipulation::is_bit_set_32
• util::bit_manipulation::set_bit_16
• util::bit_manipulation::set_bit_32

Constants

• arch::size::BYTES_PER_KB
• arch::size::BYTES_PER_MB
• cpu::registers::LP_REG
• cpu::registers::NUM_OF_REGISTERS
• cpu::registers::PC_REG
• cpu::registers::SP_REG
• memory::memory_map::arm11_io_registers_physical_map::EMMC_BLKCOUNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_BLKCOUNT_SIZE
• memory::memory_map::arm11_io_registers_physical_map::EMMC_CMDARG0_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_CMDARG0_SIZE
• memory::memory_map::arm11_io_registers_physical_map::EMMC_CMDARG1_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_CMDARG1_SIZE
• memory::memory_map::arm11_io_registers_physical_map::EMMC_CMD_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_CMD_SIZE
• memory::memory_map::arm11_io_registers_physical_map::EMMC_PORTSEL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_PORTSEL_SIZE
• memory::memory_map::arm11_io_registers_physical_map::EMMC_RESP0_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_RESP1_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_RESP2_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_RESP3_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_RESP4_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_RESP5_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_RESP6_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_RESP7_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_RESP_SIZE
• memory::memory_map::arm11_io_registers_physical_map::EMMC_STATUS0_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_STATUS0_SIZE
• memory::memory_map::arm11_io_registers_physical_map::EMMC_STATUS1_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_STATUS1_SIZE
• memory::memory_map::arm11_io_registers_physical_map::EMMC_STOP_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::EMMC_STOP_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_BOOTENV_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_BOOTENV_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_CARDCTL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_CARDCTL_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_CARDCYCLESS0_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_CARDCYCLESS0_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_CARDCYCLESS1_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_CARDCYCLESS1_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_CARDSTATUS_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_CARDSTATUS_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_DEBUGCTL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_DEBUGCTL_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_EXTMEMCNT9_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_EXTMEMCNT9_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_MPCORECFG_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_MPCORECFG_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_RST11_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_RST11_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_SDMMCCTL_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_SDMMCCT_OFFSETL
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_SYSPROT11_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_SYSPROT11_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_SYSPROT9_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_SYSPROT9_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_TWLUNITINFO_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_TWLUNITINFO_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_UNITINFO_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_UNITINFO_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_UNKNOWN_REG_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_UNKNOWN_REG_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_XDMA_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CFG9_XDMA_CNT_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_BLKCNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_BLKCNT_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_CMD_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_CMD_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_CNT_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_FIFO_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_FIFO_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_SECCNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_SECCNT_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_SECSEED_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_CTRCARD_SECSEED_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_IRQ_IE_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_IRQ_IE_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_IRQ_IF_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_IRQ_IF_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_NDMA0_BLOCK_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA0_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA0_DST_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA0_FILL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA0_SRC_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA0_TRANSFER_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA0_WRITE_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA1_BLOCK_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA1_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA1_DST_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA1_FILL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA1_SRC_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA1_TRANSFER_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA1_WRITE_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA2_BLOCK_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA2_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA2_DST_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA2_FILL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA2_SRC_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA2_TRANSFER_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA2_WRITE_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA3_BLOCK_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA3_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA3_DST_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA3_FILL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA3_SRC_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA3_TRANSFER_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA3_WRITE_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA4_BLOCK_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA4_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA4_DST_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA4_FILL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA4_SRC_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA4_TRANSFER_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA4_WRITE_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA5_BLOCK_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA5_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA5_DST_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA5_FILL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA5_SRC_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA5_TRANSFER_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA5_WRITE_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA6_BLOCK_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA6_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA6_DST_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA6_FILL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA6_SRC_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA6_TRANSFER_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA6_WRITE_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA7_BLOCK_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA7_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA7_DST_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA7_FILL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA7_SRC_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA7_TRANSFER_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA7_WRITE_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA8_BLOCK_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA8_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA8_DST_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA8_FILL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA8_SRC_ADDR_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA8_TRANSFER_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA8_WRITE_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA_GLOBAL_CNT_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_NDMA_GLOBAL_CNT_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_NDMA_REGISTER_SIZE
• memory::memory_map::arm11_io_registers_physical_map::_TIMER0_CTL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_TIMER0_VAL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_TIMER1_CTL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_TIMER1_VAL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_TIMER2_CTL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_TIMER2_VAL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_TIMER3_CTL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_TIMER3_VAL_OFFSET
• memory::memory_map::arm11_io_registers_physical_map::_TIMER_REG_SIZE
• memory::memory_map::arm11_physical_memory_map::ARM11_BOOTROM_MIRROR_OFFSET
• memory::memory_map::arm11_physical_memory_map::ARM11_BOOTROM_MIRROR_RANGE
• memory::memory_map::arm11_physical_memory_map::ARM11_BOOTROM_OFFSET
• memory::memory_map::arm11_physical_memory_map::ARM11_BOOTROM_RANGE
• memory::memory_map::arm11_physical_memory_map::ARM11_BOOTROM_SIZE
• memory::memory_map::arm11_physical_memory_map::AXI_WRAM_MEMORY_OFFSET
• memory::memory_map::arm11_physical_memory_map::AXI_WRAM_MEMORY_RANGE
• memory::memory_map::arm11_physical_memory_map::AXI_WRAM_MEMORY_SIZE
• memory::memory_map::arm11_physical_memory_map::BOOTROM_MIRROR2_OFFSET
• memory::memory_map::arm11_physical_memory_map::BOOTROM_MIRROR2_RANGE
• memory::memory_map::arm11_physical_memory_map::DSP_MEMORY_OFFSET
• memory::memory_map::arm11_physical_memory_map::DSP_MEMORY_RANGE
• memory::memory_map::arm11_physical_memory_map::DSP_MEMORY_SIZE
• memory::memory_map::arm11_physical_memory_map::FCRAM_OFFSET
• memory::memory_map::arm11_physical_memory_map::FCRAM_RANGE
• memory::memory_map::arm11_physical_memory_map::FCRAM_SIZE
• memory::memory_map::arm11_physical_memory_map::IO_MEMORY_OFFSET
• memory::memory_map::arm11_physical_memory_map::IO_MEMORY_RANGE
• memory::memory_map::arm11_physical_memory_map::IO_MEMORY_SIZE
• memory::memory_map::arm11_physical_memory_map::MPCORE_PRIVATE_MEMORY_OFFSET
• memory::memory_map::arm11_physical_memory_map::MPCORE_PRIVATE_MEMORY_RANGE
• memory::memory_map::arm11_physical_memory_map::MPCORE_PRIVATE_MEMORY_SIZE
• memory::memory_map::arm11_physical_memory_map::VRAM_OFFSET
• memory::memory_map::arm11_physical_memory_map::VRAM_RANGE
• memory::memory_map::arm11_physical_memory_map::VRAM_SIZE
• memory::memory_map::arm9_physical_memory_map::ARM9_BOOTROM_OFFSET
• memory::memory_map::arm9_physical_memory_map::ARM9_BOOTROM_RANGE
• memory::memory_map::arm9_physical_memory_map::ARM9_BOOTROM_SIZE